1. Field of the Invention
The present invention relates to a film forming method and a semiconductor device manufacturing method and, more particularly, a film forming method for use in forming a planarized interlayer insulating film for covering interconnection layers, etc. of a semiconductor integrated circuit device and a semiconductor device manufacturing method.
2. Description of the Prior Art
In recent years, the use of multilayered interconnection layers extending over several layers or more has increased with the progress in high integration density in the field of the semiconductor integrated circuit device. In such cases, an urgent need exists to develop a film forming method by which a planarized interlayer insulating film can be formed at a lower temperature of 500.degree. C. or lower because aluminum material has often been used as the interconnection layers.
In the prior art, there have been two conventional methods used as a method for planarizing the insulating film. In one conventional method, as shown in FIGS. 1A and 1B, first a film is formed by a thermal CVD method, plasma enhanced CVD method, or the like and then the film is planarized by heating to produce fluid flow. In the other conventional planarizing methods, like the etching back method shown in FIGS. 2A to 2C or the CMP (chemical mechanical polishing) method shown in FIGS. 3A and 3B, unevenness of the surface of the insulating film is removed by etching or polishing.
In the case of the former, as shown in FIG. 1A, a BPSG (borophosphosilicate glass) film 4 is formed by the thermal CVD method using selectively the following reaction gases,
(1) SiH.sub.4 +PH.sub.3 +B.sub.2 H.sub.6 +O.sub.2 (PH.sub.3 : phosphine), and PA1 (2) TEOS+TMOP+TMB or TEB+O.sub.2 or O.sub.3 (TEOS: tetraethylorthosilicate (Si(OC.sub.2 H.sub.5).sub.4), TMOP: trimethylphosphate (PO(OCH.sub.3).sub.3)). PA1 (1) SiH.sub.4 +PH.sub.3 +B.sub.2 H.sub.6 +O.sub.2 and PA1 (2) TEOS+TMOP+TMB or TEB+O.sub.2. PA1 (1) SiH.sub.4 +O.sub.2 (thermal CVD method or plasma enhanced CVD method), PA1 (2) TEOS+O.sub.2 or O.sub.3 (thermal CVD method), and PA1 (3) TEOS+O.sub.2 (plasma enhanced CVD method).
Otherwise, as shown in FIG. 1A, the BPSG film 4 is formed by a plasma enhanced CVD method using selectively the following reaction gases,
See, for instance, Williams, D. S. and Dein, E. A.: J. Electrochem. Soc., 134,3,: 657, 1987, Levin, R. M. and Evans-Lutterodt, K.: J. Vac. Sci. Technol., B1, 1:54, 1983, and Sato, J. and Maeda, K.: Extended Abstract of Electrochem. Soc. Spring Meeting: 31, 1971.
After this, as shown in FIG. 1E, the BPSG film 4 thus formed is heated at about 850.degree. C. to be fluidized, thereby achieving planarization of the surface. In the case of the PSG film, the PSG film is first formed by the thermal CVD method, plasma enhanced CVD method, etc., using a reaction gas lacking the boron containing gas (B.sub.2 H.sub.6, TMB, or TEB) of the above described reaction gas, and then the PSG film thus obtained is heated at a temperature of 1000.degree. C. or lower to be fluidized, so that the surface of the PSG film is planarized.
In the case of the latter, as shown in FIGS. 2A and 3A, a NSC film 5 is first formed by a thermal CVD method, plasma enhanced CVD method, or the like using one of the following reaction gases,
According to the etching back method, as shown in FIG. 2B, a resist film 6 is coated on the NSG film 5 so that an entire surface is planarized, and then, as shown in FIG. 2C, the planarized NSG film 5a is formed by an etching process. According to the CMP method, as shown in FIG. 3B, the above NSG film 5 is formed and then a surface of the NSG film 5b is planarized by polishing.
In FIGS. 1 to 3, a reference numeral 1 denotes a semiconductor substrate; 2, a ground insulating film; and 3a, 3b, interconnection layers formed on the ground insulating film 2.
The planarization by the etching back method and the CMP method described above is effective when a low temperature treatment is needed since no heating process is required, unlike the planarization method using fluidization by heating. However, as shown in FIGS. 2A, 2B and FIGS. 3A, 3B, if voids are formed in the concave portions between the interconnection layers 3a, 3b, etc. immediately after the insulating film 5 is formed, such voids still remain unchanged after planarization. At present, high density plasma CVD (HDP-CVD), plasma enhanced CVD, atmospheric pressure thermal CVD, SOG (spin-on-glass) coating, etc. are utilized for forming the insulating film with good adaptability for filling the concave portions. However, since the above planarization methods do not employ the thermal fluidizing step, it is difficult to completely embed the concave portions in the insulating film material if the distance between the interconnection layers is much narrowed due to higher integration density.
In contrast, in the planarization method using fluidization by heating, complete filling can be expected since thermal fluidity is employed, as shown in FIGS. 1A and 1B. At present, the BPSG film 4 is conventionally used in this application. However, since the BPSG film 4 has to be heated at least up to 850.degree. C. to become fluid, it is not usable as the ground film 2 underlying the interconnection layers 3a, 3b and the interlayer insulating film 4, formed at the low temperature. In particular, the BPSG film 4 cannot be used as the insulating film for covering aluminum interconnection layers. The fluidizing temperature can be reduced to some extent if phosphorus or boron concentration is increased. However, such reduction is insufficient and this approach creates another problem in that stabilization and moisture resistance of the insulating films 2 4 are degraded. For the PSG film, the fluidization temperature is required to be substantially the same as that of the BPSG film and therefore the above problems occur similarly.
A GeBPSG film which can be formed by adding GeO.sub.2 to the BPSG film has been developed for use as an insulating film with low fluidization temperature, but the temperature is merely reduced to about 750.degree. C. Therefore, it is hard to use the GeBPSG film as the ground film and the interlayer insulating film which are to be processed at low temperature.